Magnetoelectronic devices, spin electronic devices, and spintronic devices are synonymous terms for devices that make use of effects predominantly caused by electron spin. Magnetoelectronics are used in numerous information devices to provide non-volatile, reliable, radiation resistant, and high-density data storage and retrieval. The numerous magnetoelectronics information devices include, but are not limited to, Magnetoresistive Random Access Memory (MRAM), magnetic sensors, and read/write heads for disk drives.
Typically an MRAM includes an array of magnetoresistive memory elements. Each magnetoresistive memory element typically has a structure that includes multiple magnetic layers separated by various non-magnetic layers, such as a magnetic tunnel junction (MTJ), and exhibits an electrical resistance that depends on the magnetic state of the device. Information is stored as directions of magnetization vectors in the magnetic layers. Magnetization vectors in one magnetic layer are magnetically fixed or pinned, while the magnetization direction of another magnetic layer may be free to switch between the same and opposite directions that are called “parallel” and “antiparallel” states, respectively. Corresponding to the parallel and antiparallel magnetic states, the magnetic memory element has low (logic “0” state) and high (logic “1” state) electrical resistance states, respectively. Accordingly, a detection of the resistance allows a magnetoresistive memory element, such as an MTJ device, to provide information stored in the magnetic memory element. There are two completely different methods used to program the free layer: field switching and spin-torque switching. In field-switched MRAM, current carrying lines adjacent to the MTJ bit are used to generate magnetic fields that act on the free layer. In spin-torque MRAM, switching is accomplished with a current pulse through the MTJ itself. The angular momentum carried by the spin-polarized tunneling current causes reversal of the free layer, with the final state (parallel or antiparallel) determined by the polarity of the current pulse. A reset current pulse will cause the final state to be parallel or logic “0”. A set current pulse, in the opposite polarity of the reset current pulse, will cause the final state to be antiparallel or logic “1”. Spin-torque transfer is known to occur in MTJ devices and giant magnetoresistance devices that are patterned or otherwise arranged so that the current flows substantially perpendicular to the interfaces, and in simple wire-like structures when the current flows substantially perpendicular to a domain wall. Any such structure that exhibits magnetoresistance may be configured to be a spin-torque magnetoresistive memory element.
Spin-torque MRAM (ST-MRAM), also known as spin-torque-transfer RAM (STT-RAM), is an emerging memory technology with the potential for non-volatility with unlimited endurance and fast write speeds at much higher density than field-switched MRAM. Since ST-MRAM switching current requirements reduce with decreasing MTJ dimensions, ST-MRAM has the potential to scale nicely at even the most advanced technology nodes. However, increasing variability in MTJ resistance and sustaining relatively high switching currents through bitcell select devices in both current directions can limit the scalability of ST-MRAM.
Referring to FIG. 1, a high ST-MRAM MTJ resistance variation and low magnetoresistance (MR) results in an overlapping distribution of resistances for high state bits 102 and low state bits 104. Known referenced read/sensing schemes using reference bits cannot distinguish high and low states successfully for 100% of the bits. Even if the number of bits in the overlapped region 101 is very low (or even zero), due to low MR and high resistance variation of the high and low state bits, a mid-point reference distribution can overlap with low or high state distributions causing read failure. Self-referenced read that references the bit being read/sensed to itself is known in the prior art to address the aforementioned sensing problem. Self-referenced sensing is typically done by sampling the resistance, resetting the bit to a known state, and evaluating the resistance difference to sense the original bit state. To avoid this destructive sensing, an alternate self-referenced sensing scheme called ‘slope sensing’ detects the presence or relative absence of a negative voltage coefficient of the bit resistance to determine the bit state (see U.S. Pat. No. 6,954,373). Practical implementation of this ‘slope sensing’ is difficult because it involves the comparison of currents from two different control variable bias conditions and that has required assumptions about the expected slope of resistance versus applied voltage in the high and low bit states in the prior art. These constraints make this type of sensing approach too restrictive to be useful or applicable over a wide range of bit resistance distributions.
Accordingly, it is desirable to provide a ST-MRAM self-referencing sense amplifier circuit and a method for self-referenced reading of bits by a slope sensing scheme that does not require resetting the bit, provides greater security of the stored data by remaining non-volatile, less power consumption, and improved bit lifetime. Furthermore, other desirable features and characteristics of the exemplary embodiments will become apparent from the subsequent detailed description and the appended claims, taken in conjunction with the accompanying drawings and the foregoing technical field and background.